ASIC Verification Engineer

May 1, 2026

At Cornelis we’re building the future of AI and HPC networking with an AI-first approach to silicon and software development. We’re seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale. Cornelis Networks delivers the world’s highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world’s most demanding computational challenges with our next-generation networking solutions. We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles. Cornelis Networks is hiring Mid-Level and Senior ASIC Verification Engineers with advanced skills and knowledge in key areas required to verify world-class SoCs to be deployed in high performance computing, high performance data analytics, and artificial intelligence interconnect solutions. Key Responsibilities: <ul> <li>Participate in development of UVM environments to verify RTL at block, unit, and SoC levels</li> <li>Write and execute tests according to verification plans</li> <li>Instrument TB for functional and code coverage; collect and analyze coverage results</li> <li>Execute formal verification of block level RTL</li> <li>Participate in post-silicon verification </li> </ul> Preferred Qualifications: <ul> <li>M.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering</li> <li>Track record of first-pass success in ASIC and Systems </li> </ul> Minimum Qualifications: <ul> <li>Must be able to read, write and speak English at a level of professional working proficiency.</li> <li>3 + years' post-college experience in verification</li> <li>3 + years' post-college experience in one or more scripting languages (TCL, Python, Perl, Shell-scripting)</li> <li>3 + years' post-college experience validating complex SoCs that include multiple clock and reset domains</li> <li>Experience in UVM based test bench development</li> <li>B.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering</li> </ul> Job Location: This role may work remote from Costa Rica via an EOR (Employer of Record). At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives. Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. <hr><div class="fabric-5qovnk-root MuiBox-root css-witlqh" data-fabric-component="Flex"><div class="fabric-5qovnk-root MuiBox-root css-1phs5iq" data-fabric-component="Flex"><div class="fabric-2lfz5e-root MuiBox-root css-jipda8" data-fabric-component="LayoutBox">Location</div><div class="fabric-15808a6-root MuiBox-root css-4cxybv" data-fabric-component="LayoutBox">San Jose, San Jose Province (Remote)</div><hr class="MuiDivider-root fabric-jcid1o-root MuiDivider-fullWidth MuiBox-root css-40h3v3" data-fabric-component="Divider"></div><div class="fabric-5qovnk-root MuiBox-root css-1phs5iq" data-fabric-component="Flex"><div class="fabric-2lfz5e-root MuiBox-root css-jipda8" data-fabric-component="LayoutBox">Department</div><div class="fabric-15808a6-root MuiBox-root css-4cxybv" data-fabric-component="LayoutBox">ASIC Engineering</div><hr class="MuiDivider-root fabric-jcid1o-root MuiDivider-fullWidth MuiBox-root css-40h3v3" data-fabric-component="Divider"></div><div class="fabric-5qovnk-root MuiBox-root css-1phs5iq" data-fabric-component="Flex"><div class="fabric-2lfz5e-root MuiBox-root css-jipda8" data-fabric-component="LayoutBox">Employment Type</div><div class="fabric-15808a6-root MuiBox-root css-4cxybv" data-fabric-component="LayoutBox">Full-Time</div><hr class="MuiDivider-root fabric-jcid1o-root MuiDivider-fullWidth MuiBox-root css-40h3v3" data-fabric-component="Divider"></div></div>

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